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Searched refs:regDSCL1_OBUF_CONTROL (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h3747 #define regDSCL1_OBUF_CONTROL … macro
H A Ddcn_3_1_5_offset.h4282 #define regDSCL1_OBUF_CONTROL … macro
H A Ddcn_3_5_1_offset.h4972 #define regDSCL1_OBUF_CONTROL … macro
H A Ddcn_3_5_0_offset.h4993 #define regDSCL1_OBUF_CONTROL … macro
H A Ddcn_3_1_4_offset.h5432 #define regDSCL1_OBUF_CONTROL … macro
H A Ddcn_3_1_2_offset.h4523 #define regDSCL1_OBUF_CONTROL … macro
H A Ddcn_3_2_1_offset.h3746 #define regDSCL1_OBUF_CONTROL … macro
H A Ddcn_3_1_6_offset.h4743 #define regDSCL1_OBUF_CONTROL … macro
H A Ddcn_4_1_0_offset.h3939 #define regDSCL1_OBUF_CONTROL … macro