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Searched refs:regDSCL1_DSCL_UPDATE (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h3719 #define regDSCL1_DSCL_UPDATE … macro
H A Ddcn_3_1_5_offset.h4254 #define regDSCL1_DSCL_UPDATE … macro
H A Ddcn_3_5_1_offset.h4944 #define regDSCL1_DSCL_UPDATE … macro
H A Ddcn_3_5_0_offset.h4965 #define regDSCL1_DSCL_UPDATE … macro
H A Ddcn_3_1_4_offset.h5404 #define regDSCL1_DSCL_UPDATE … macro
H A Ddcn_3_1_2_offset.h4495 #define regDSCL1_DSCL_UPDATE … macro
H A Ddcn_3_2_1_offset.h3718 #define regDSCL1_DSCL_UPDATE … macro
H A Ddcn_3_1_6_offset.h4715 #define regDSCL1_DSCL_UPDATE … macro
H A Ddcn_4_1_0_offset.h3911 #define regDSCL1_DSCL_UPDATE … macro