Home
last modified time | relevance | path

Searched refs:regDSCL0_OBUF_CONTROL (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h3357 #define regDSCL0_OBUF_CONTROL … macro
H A Ddcn_3_1_5_offset.h3590 #define regDSCL0_OBUF_CONTROL … macro
H A Ddcn_3_5_1_offset.h4560 #define regDSCL0_OBUF_CONTROL … macro
H A Ddcn_3_5_0_offset.h4581 #define regDSCL0_OBUF_CONTROL … macro
H A Ddcn_3_1_4_offset.h4740 #define regDSCL0_OBUF_CONTROL … macro
H A Ddcn_3_1_2_offset.h3831 #define regDSCL0_OBUF_CONTROL … macro
H A Ddcn_3_2_1_offset.h3356 #define regDSCL0_OBUF_CONTROL … macro
H A Ddcn_3_1_6_offset.h4051 #define regDSCL0_OBUF_CONTROL … macro
H A Ddcn_4_1_0_offset.h3430 #define regDSCL0_OBUF_CONTROL … macro