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Searched refs:regDSCL0_DSCL_EXT_OVERSCAN_LEFT_RIGHT_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h3334 #define regDSCL0_DSCL_EXT_OVERSCAN_LEFT_RIGHT_BASE_IDX macro
H A Ddcn_3_1_5_offset.h3567 #define regDSCL0_DSCL_EXT_OVERSCAN_LEFT_RIGHT_BASE_IDX macro
H A Ddcn_3_5_1_offset.h4537 #define regDSCL0_DSCL_EXT_OVERSCAN_LEFT_RIGHT_BASE_IDX macro
H A Ddcn_3_5_0_offset.h4558 #define regDSCL0_DSCL_EXT_OVERSCAN_LEFT_RIGHT_BASE_IDX macro
H A Ddcn_3_1_4_offset.h4717 #define regDSCL0_DSCL_EXT_OVERSCAN_LEFT_RIGHT_BASE_IDX macro
H A Ddcn_3_1_2_offset.h3808 #define regDSCL0_DSCL_EXT_OVERSCAN_LEFT_RIGHT_BASE_IDX macro
H A Ddcn_3_2_1_offset.h3333 #define regDSCL0_DSCL_EXT_OVERSCAN_LEFT_RIGHT_BASE_IDX macro
H A Ddcn_3_1_6_offset.h4028 #define regDSCL0_DSCL_EXT_OVERSCAN_LEFT_RIGHT_BASE_IDX macro
H A Ddcn_4_1_0_offset.h3407 #define regDSCL0_DSCL_EXT_OVERSCAN_LEFT_RIGHT_BASE_IDX macro