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Searched refs:regDSCC3_DSCC_INTERRUPT_CONTROL_STATUS (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h12075 #define regDSCC3_DSCC_INTERRUPT_CONTROL_STATUS … macro
H A Ddcn_3_5_1_offset.h10879 #define regDSCC3_DSCC_INTERRUPT_CONTROL_STATUS … macro
H A Ddcn_3_5_0_offset.h10900 #define regDSCC3_DSCC_INTERRUPT_CONTROL_STATUS … macro
H A Ddcn_3_1_4_offset.h12002 #define regDSCC3_DSCC_INTERRUPT_CONTROL_STATUS … macro
H A Ddcn_3_2_1_offset.h12065 #define regDSCC3_DSCC_INTERRUPT_CONTROL_STATUS … macro