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Searched refs:regDSCC2_DSCC_PPS_CONFIG6_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h11972 #define regDSCC2_DSCC_PPS_CONFIG6_BASE_IDX macro
H A Ddcn_3_1_5_offset.h12625 #define regDSCC2_DSCC_PPS_CONFIG6_BASE_IDX macro
H A Ddcn_3_5_1_offset.h10762 #define regDSCC2_DSCC_PPS_CONFIG6_BASE_IDX macro
H A Ddcn_3_5_0_offset.h10783 #define regDSCC2_DSCC_PPS_CONFIG6_BASE_IDX macro
H A Ddcn_3_1_4_offset.h11885 #define regDSCC2_DSCC_PPS_CONFIG6_BASE_IDX macro
H A Ddcn_3_1_2_offset.h12760 #define regDSCC2_DSCC_PPS_CONFIG6_BASE_IDX macro
H A Ddcn_3_2_1_offset.h11969 #define regDSCC2_DSCC_PPS_CONFIG6_BASE_IDX macro
H A Ddcn_3_1_6_offset.h13356 #define regDSCC2_DSCC_PPS_CONFIG6_BASE_IDX macro
H A Ddcn_4_1_0_offset.h12224 #define regDSCC2_DSCC_PPS_CONFIG6_BASE_IDX macro