Home
last modified time | relevance | path

Searched refs:regDSCC2_DSCC_PPS_CONFIG17_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h11994 #define regDSCC2_DSCC_PPS_CONFIG17_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h12647 #define regDSCC2_DSCC_PPS_CONFIG17_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h10784 #define regDSCC2_DSCC_PPS_CONFIG17_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h10805 #define regDSCC2_DSCC_PPS_CONFIG17_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h11907 #define regDSCC2_DSCC_PPS_CONFIG17_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h12782 #define regDSCC2_DSCC_PPS_CONFIG17_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h11991 #define regDSCC2_DSCC_PPS_CONFIG17_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h13378 #define regDSCC2_DSCC_PPS_CONFIG17_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h12220 #define regDSCC2_DSCC_PPS_CONFIG17_BASE_IDX … macro