Home
last modified time | relevance | path

Searched refs:regDSCC1_DSCC_PPS_CONFIG21_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h11884 #define regDSCC1_DSCC_PPS_CONFIG21_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h12523 #define regDSCC1_DSCC_PPS_CONFIG21_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h10660 #define regDSCC1_DSCC_PPS_CONFIG21_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h10681 #define regDSCC1_DSCC_PPS_CONFIG21_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h11783 #define regDSCC1_DSCC_PPS_CONFIG21_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h12658 #define regDSCC1_DSCC_PPS_CONFIG21_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h11887 #define regDSCC1_DSCC_PPS_CONFIG21_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h13254 #define regDSCC1_DSCC_PPS_CONFIG21_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h12110 #define regDSCC1_DSCC_PPS_CONFIG21_BASE_IDX … macro