Home
last modified time | relevance | path

Searched refs:regDSCC0_DSCC_PPS_CONFIG21 (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h11765 #define regDSCC0_DSCC_PPS_CONFIG21 macro
H A Ddcn_3_1_5_offset.h12390 #define regDSCC0_DSCC_PPS_CONFIG21 macro
H A Ddcn_3_5_1_offset.h10528 #define regDSCC0_DSCC_PPS_CONFIG21 macro
H A Ddcn_3_5_0_offset.h10549 #define regDSCC0_DSCC_PPS_CONFIG21 macro
H A Ddcn_3_1_4_offset.h11650 #define regDSCC0_DSCC_PPS_CONFIG21 macro
H A Ddcn_3_1_2_offset.h12525 #define regDSCC0_DSCC_PPS_CONFIG21 macro
H A Ddcn_3_2_1_offset.h11774 #define regDSCC0_DSCC_PPS_CONFIG21 macro
H A Ddcn_3_1_6_offset.h13121 #define regDSCC0_DSCC_PPS_CONFIG21 macro
H A Ddcn_4_1_0_offset.h11939 #define regDSCC0_DSCC_PPS_CONFIG21 macro