Home
last modified time | relevance | path

Searched refs:regDSCC0_DSCC_PPS_CONFIG10 (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h11743 #define regDSCC0_DSCC_PPS_CONFIG10 … macro
H A Ddcn_3_1_5_offset.h12368 #define regDSCC0_DSCC_PPS_CONFIG10 … macro
H A Ddcn_3_5_1_offset.h10506 #define regDSCC0_DSCC_PPS_CONFIG10 … macro
H A Ddcn_3_5_0_offset.h10527 #define regDSCC0_DSCC_PPS_CONFIG10 … macro
H A Ddcn_3_1_4_offset.h11628 #define regDSCC0_DSCC_PPS_CONFIG10 … macro
H A Ddcn_3_1_2_offset.h12503 #define regDSCC0_DSCC_PPS_CONFIG10 … macro
H A Ddcn_3_2_1_offset.h11752 #define regDSCC0_DSCC_PPS_CONFIG10 … macro
H A Ddcn_3_1_6_offset.h13099 #define regDSCC0_DSCC_PPS_CONFIG10 … macro
H A Ddcn_4_1_0_offset.h11917 #define regDSCC0_DSCC_PPS_CONFIG10 … macro