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Searched refs:regDP_DPHY_SYM320_DP_DPHY_SYM32_CONTROL_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h12954 #define regDP_DPHY_SYM320_DP_DPHY_SYM32_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h13523 #define regDP_DPHY_SYM320_DP_DPHY_SYM32_CONTROL_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h11432 #define regDP_DPHY_SYM320_DP_DPHY_SYM32_CONTROL_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h11453 #define regDP_DPHY_SYM320_DP_DPHY_SYM32_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h12553 #define regDP_DPHY_SYM320_DP_DPHY_SYM32_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h13660 #define regDP_DPHY_SYM320_DP_DPHY_SYM32_CONTROL_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h12938 #define regDP_DPHY_SYM320_DP_DPHY_SYM32_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h14256 #define regDP_DPHY_SYM320_DP_DPHY_SYM32_CONTROL_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h13793 #define regDP_DPHY_SYM320_DP_DPHY_SYM32_CONTROL_BASE_IDX … macro