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Searched refs:regDP1_DP_DPHY_TRAINING_PATTERN_SEL (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h9153 #define regDP1_DP_DPHY_TRAINING_PATTERN_SEL … macro
H A Ddcn_3_1_5_offset.h9778 #define regDP1_DP_DPHY_TRAINING_PATTERN_SEL … macro
H A Ddcn_3_5_1_offset.h8492 #define regDP1_DP_DPHY_TRAINING_PATTERN_SEL … macro
H A Ddcn_3_5_0_offset.h8513 #define regDP1_DP_DPHY_TRAINING_PATTERN_SEL … macro
H A Ddcn_3_1_4_offset.h9682 #define regDP1_DP_DPHY_TRAINING_PATTERN_SEL … macro
H A Ddcn_3_1_2_offset.h10023 #define regDP1_DP_DPHY_TRAINING_PATTERN_SEL … macro
H A Ddcn_3_2_1_offset.h9152 #define regDP1_DP_DPHY_TRAINING_PATTERN_SEL … macro
H A Ddcn_3_1_6_offset.h10247 #define regDP1_DP_DPHY_TRAINING_PATTERN_SEL … macro
H A Ddcn_4_1_0_offset.h9838 #define regDP1_DP_DPHY_TRAINING_PATTERN_SEL … macro