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Searched refs:regDP1_DP_DPHY_BS_SR_SWAP_CNTL_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h9222 #define regDP1_DP_DPHY_BS_SR_SWAP_CNTL_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h9847 #define regDP1_DP_DPHY_BS_SR_SWAP_CNTL_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h8561 #define regDP1_DP_DPHY_BS_SR_SWAP_CNTL_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h8582 #define regDP1_DP_DPHY_BS_SR_SWAP_CNTL_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h9751 #define regDP1_DP_DPHY_BS_SR_SWAP_CNTL_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h10092 #define regDP1_DP_DPHY_BS_SR_SWAP_CNTL_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h9221 #define regDP1_DP_DPHY_BS_SR_SWAP_CNTL_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h10316 #define regDP1_DP_DPHY_BS_SR_SWAP_CNTL_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h9923 #define regDP1_DP_DPHY_BS_SR_SWAP_CNTL_BASE_IDX … macro