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Searched refs:regDP1_DP_DPHY_BS_SR_SWAP_CNTL (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h9221 #define regDP1_DP_DPHY_BS_SR_SWAP_CNTL … macro
H A Ddcn_3_1_5_offset.h9846 #define regDP1_DP_DPHY_BS_SR_SWAP_CNTL … macro
H A Ddcn_3_5_1_offset.h8560 #define regDP1_DP_DPHY_BS_SR_SWAP_CNTL … macro
H A Ddcn_3_5_0_offset.h8581 #define regDP1_DP_DPHY_BS_SR_SWAP_CNTL … macro
H A Ddcn_3_1_4_offset.h9750 #define regDP1_DP_DPHY_BS_SR_SWAP_CNTL … macro
H A Ddcn_3_1_2_offset.h10091 #define regDP1_DP_DPHY_BS_SR_SWAP_CNTL … macro
H A Ddcn_3_2_1_offset.h9220 #define regDP1_DP_DPHY_BS_SR_SWAP_CNTL … macro
H A Ddcn_3_1_6_offset.h10315 #define regDP1_DP_DPHY_BS_SR_SWAP_CNTL … macro
H A Ddcn_4_1_0_offset.h9914 #define regDP1_DP_DPHY_BS_SR_SWAP_CNTL … macro