Home
last modified time | relevance | path

Searched refs:regDMCUB_MEM_PWR_CNTL_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h677 #define regDMCUB_MEM_PWR_CNTL_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h793 #define regDMCUB_MEM_PWR_CNTL_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h2039 #define regDMCUB_MEM_PWR_CNTL_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h2060 #define regDMCUB_MEM_PWR_CNTL_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h2311 #define regDMCUB_MEM_PWR_CNTL_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h1090 #define regDMCUB_MEM_PWR_CNTL_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h677 #define regDMCUB_MEM_PWR_CNTL_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h1294 #define regDMCUB_MEM_PWR_CNTL_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h728 #define regDMCUB_MEM_PWR_CNTL_BASE_IDX … macro