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Searched refs:regDIG0_TMDS_DCBALANCER_CONTROL_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h9106 #define regDIG0_TMDS_DCBALANCER_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h9731 #define regDIG0_TMDS_DCBALANCER_CONTROL_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h8077 #define regDIG0_TMDS_DCBALANCER_CONTROL_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h8098 #define regDIG0_TMDS_DCBALANCER_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h9281 #define regDIG0_TMDS_DCBALANCER_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h9976 #define regDIG0_TMDS_DCBALANCER_CONTROL_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h9105 #define regDIG0_TMDS_DCBALANCER_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h10200 #define regDIG0_TMDS_DCBALANCER_CONTROL_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h9802 #define regDIG0_TMDS_DCBALANCER_CONTROL_BASE_IDX … macro