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Searched refs:regDCPG_INTERRUPT_CONTROL_3_BASE_IDX (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h453 #define regDCPG_INTERRUPT_CONTROL_3_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h1610 #define regDCPG_INTERRUPT_CONTROL_3_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h1631 #define regDCPG_INTERRUPT_CONTROL_3_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h1755 #define regDCPG_INTERRUPT_CONTROL_3_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h872 #define regDCPG_INTERRUPT_CONTROL_3_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h453 #define regDCPG_INTERRUPT_CONTROL_3_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h1076 #define regDCPG_INTERRUPT_CONTROL_3_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h500 #define regDCPG_INTERRUPT_CONTROL_3_BASE_IDX … macro