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Searched refs:regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED50 (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dpcs/
H A Ddpcs_3_1_4_offset.h6918 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED50 … macro
H A Ddpcs_4_2_3_offset.h1091 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED50 … macro
H A Ddpcs_4_2_2_offset.h1055 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED50 … macro
H A Ddpcs_4_2_0_offset.h1058 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED50 … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h11541 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED50 … macro
H A Ddcn_3_1_5_offset.h12132 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED50 … macro
H A Ddcn_3_5_1_offset.h10254 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED50 … macro
H A Ddcn_3_5_0_offset.h10275 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED50 … macro
H A Ddcn_3_1_4_offset.h11376 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED50 … macro
H A Ddcn_3_1_2_offset.h12267 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED50 … macro
H A Ddcn_3_2_1_offset.h11550 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED50 … macro
H A Ddcn_3_1_6_offset.h12623 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED50 … macro
H A Ddcn_4_1_0_offset.h11825 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED50 … macro