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Searched refs:regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED48 (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dpcs/
H A Ddpcs_3_1_4_offset.h6914 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED48 … macro
H A Ddpcs_4_2_3_offset.h1087 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED48 … macro
H A Ddpcs_4_2_2_offset.h1051 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED48 … macro
H A Ddpcs_4_2_0_offset.h1054 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED48 … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h11537 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED48 … macro
H A Ddcn_3_1_5_offset.h12128 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED48 … macro
H A Ddcn_3_5_1_offset.h10250 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED48 … macro
H A Ddcn_3_5_0_offset.h10271 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED48 … macro
H A Ddcn_3_1_4_offset.h11372 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED48 … macro
H A Ddcn_3_1_2_offset.h12263 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED48 … macro
H A Ddcn_3_2_1_offset.h11546 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED48 … macro
H A Ddcn_3_1_6_offset.h12619 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED48 … macro
H A Ddcn_4_1_0_offset.h11821 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED48 … macro