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Searched refs:regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED47 (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dpcs/
H A Ddpcs_3_1_4_offset.h6912 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED47 … macro
H A Ddpcs_4_2_3_offset.h1085 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED47 … macro
H A Ddpcs_4_2_2_offset.h1049 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED47 … macro
H A Ddpcs_4_2_0_offset.h1052 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED47 … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h11535 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED47 … macro
H A Ddcn_3_1_5_offset.h12126 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED47 … macro
H A Ddcn_3_5_1_offset.h10248 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED47 … macro
H A Ddcn_3_5_0_offset.h10269 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED47 … macro
H A Ddcn_3_1_4_offset.h11370 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED47 … macro
H A Ddcn_3_1_2_offset.h12261 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED47 … macro
H A Ddcn_3_2_1_offset.h11544 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED47 … macro
H A Ddcn_3_1_6_offset.h12617 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED47 … macro
H A Ddcn_4_1_0_offset.h11819 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED47 … macro