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Searched refs:regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED46 (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dpcs/
H A Ddpcs_3_1_4_offset.h6910 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED46 … macro
H A Ddpcs_4_2_3_offset.h1083 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED46 … macro
H A Ddpcs_4_2_2_offset.h1047 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED46 … macro
H A Ddpcs_4_2_0_offset.h1050 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED46 … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h11533 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED46 … macro
H A Ddcn_3_1_5_offset.h12124 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED46 … macro
H A Ddcn_3_5_1_offset.h10246 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED46 … macro
H A Ddcn_3_5_0_offset.h10267 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED46 … macro
H A Ddcn_3_1_4_offset.h11368 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED46 … macro
H A Ddcn_3_1_2_offset.h12259 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED46 … macro
H A Ddcn_3_2_1_offset.h11542 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED46 … macro
H A Ddcn_3_1_6_offset.h12615 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED46 … macro
H A Ddcn_4_1_0_offset.h11817 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED46 … macro