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Searched refs:regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED42 (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dpcs/
H A Ddpcs_3_1_4_offset.h6902 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED42 … macro
H A Ddpcs_4_2_3_offset.h1075 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED42 … macro
H A Ddpcs_4_2_2_offset.h1039 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED42 … macro
H A Ddpcs_4_2_0_offset.h1042 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED42 … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h11525 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED42 … macro
H A Ddcn_3_1_5_offset.h12116 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED42 … macro
H A Ddcn_3_5_1_offset.h10238 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED42 … macro
H A Ddcn_3_5_0_offset.h10259 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED42 … macro
H A Ddcn_3_1_4_offset.h11360 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED42 … macro
H A Ddcn_3_1_2_offset.h12251 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED42 … macro
H A Ddcn_3_2_1_offset.h11534 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED42 … macro
H A Ddcn_3_1_6_offset.h12607 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED42 … macro
H A Ddcn_4_1_0_offset.h11809 #define regDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED42 … macro