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Searched refs:regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED5 (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dpcs/
H A Ddpcs_3_1_4_offset.h6702 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED5 … macro
H A Ddpcs_4_2_3_offset.h881 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED5 … macro
H A Ddpcs_4_2_2_offset.h845 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED5 … macro
H A Ddpcs_4_2_0_offset.h848 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED5 … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h11331 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED5 … macro
H A Ddcn_3_1_5_offset.h11922 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED5 … macro
H A Ddcn_3_5_1_offset.h10044 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED5 … macro
H A Ddcn_3_5_0_offset.h10065 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED5 … macro
H A Ddcn_3_1_4_offset.h11166 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED5 … macro
H A Ddcn_3_1_2_offset.h12057 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED5 … macro
H A Ddcn_3_2_1_offset.h11340 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED5 … macro
H A Ddcn_3_1_6_offset.h12413 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED5 … macro
H A Ddcn_4_1_0_offset.h11615 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED5 … macro