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Searched refs:regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED40 (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dpcs/
H A Ddpcs_3_1_4_offset.h6772 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED40 … macro
H A Ddpcs_4_2_3_offset.h951 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED40 … macro
H A Ddpcs_4_2_2_offset.h915 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED40 … macro
H A Ddpcs_4_2_0_offset.h918 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED40 … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h11401 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED40 … macro
H A Ddcn_3_1_5_offset.h11992 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED40 … macro
H A Ddcn_3_5_1_offset.h10114 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED40 … macro
H A Ddcn_3_5_0_offset.h10135 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED40 … macro
H A Ddcn_3_1_4_offset.h11236 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED40 … macro
H A Ddcn_3_1_2_offset.h12127 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED40 … macro
H A Ddcn_3_2_1_offset.h11410 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED40 … macro
H A Ddcn_3_1_6_offset.h12483 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED40 … macro
H A Ddcn_4_1_0_offset.h11685 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED40 … macro