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Searched refs:regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED31 (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dpcs/
H A Ddpcs_3_1_4_offset.h6754 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED31 macro
H A Ddpcs_4_2_3_offset.h933 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED31 macro
H A Ddpcs_4_2_2_offset.h897 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED31 macro
H A Ddpcs_4_2_0_offset.h900 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED31 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h11383 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED31 macro
H A Ddcn_3_1_5_offset.h11974 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED31 macro
H A Ddcn_3_5_1_offset.h10096 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED31 macro
H A Ddcn_3_5_0_offset.h10117 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED31 macro
H A Ddcn_3_1_4_offset.h11218 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED31 macro
H A Ddcn_3_1_2_offset.h12109 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED31 macro
H A Ddcn_3_2_1_offset.h11392 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED31 macro
H A Ddcn_3_1_6_offset.h12465 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED31 macro
H A Ddcn_4_1_0_offset.h11667 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED31 macro