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Searched refs:regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED0 (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dpcs/
H A Ddpcs_3_1_4_offset.h6692 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED0 … macro
H A Ddpcs_4_2_3_offset.h871 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED0 … macro
H A Ddpcs_4_2_2_offset.h835 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED0 … macro
H A Ddpcs_4_2_0_offset.h838 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED0 … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h11321 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED0 … macro
H A Ddcn_3_1_5_offset.h11912 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED0 … macro
H A Ddcn_3_5_1_offset.h10034 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED0 … macro
H A Ddcn_3_5_0_offset.h10055 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED0 … macro
H A Ddcn_3_1_4_offset.h11156 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED0 … macro
H A Ddcn_3_1_2_offset.h12047 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED0 … macro
H A Ddcn_3_2_1_offset.h11330 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED0 … macro
H A Ddcn_3_1_6_offset.h12403 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED0 … macro
H A Ddcn_4_1_0_offset.h11605 #define regDCIO_UNIPHY2_UNIPHY_MACRO_CNTL_RESERVED0 … macro