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Searched refs:regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED53 (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dpcs/
H A Ddpcs_3_1_4_offset.h6580 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED53 … macro
H A Ddpcs_4_2_3_offset.h857 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED53 … macro
H A Ddpcs_4_2_2_offset.h821 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED53 … macro
H A Ddpcs_4_2_0_offset.h824 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED53 … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h11307 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED53 … macro
H A Ddcn_3_1_5_offset.h11898 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED53 … macro
H A Ddcn_3_5_1_offset.h10020 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED53 … macro
H A Ddcn_3_5_0_offset.h10041 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED53 … macro
H A Ddcn_3_1_4_offset.h11142 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED53 … macro
H A Ddcn_3_1_2_offset.h12033 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED53 … macro
H A Ddcn_3_2_1_offset.h11316 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED53 … macro
H A Ddcn_3_1_6_offset.h12389 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED53 … macro
H A Ddcn_4_1_0_offset.h11591 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED53 … macro