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Searched refs:regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED0 (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dpcs/
H A Ddpcs_3_1_4_offset.h6474 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED0 … macro
H A Ddpcs_4_2_3_offset.h751 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED0 … macro
H A Ddpcs_4_2_2_offset.h715 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED0 … macro
H A Ddpcs_4_2_0_offset.h718 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED0 … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h11201 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED0 … macro
H A Ddcn_3_1_5_offset.h11792 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED0 … macro
H A Ddcn_3_5_1_offset.h9914 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED0 … macro
H A Ddcn_3_5_0_offset.h9935 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED0 … macro
H A Ddcn_3_1_4_offset.h11036 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED0 … macro
H A Ddcn_3_1_2_offset.h11927 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED0 … macro
H A Ddcn_3_2_1_offset.h11210 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED0 … macro
H A Ddcn_3_1_6_offset.h12283 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED0 … macro
H A Ddcn_4_1_0_offset.h11485 #define regDCIO_UNIPHY1_UNIPHY_MACRO_CNTL_RESERVED0 … macro