Home
last modified time | relevance | path

Searched refs:regD5VGA_CONTROL_BASE_IDX (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h1031 #define regD5VGA_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h1157 #define regD5VGA_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h1304 #define regD5VGA_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h1394 #define regD5VGA_CONTROL_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h1031 #define regD5VGA_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h1610 #define regD5VGA_CONTROL_BASE_IDX … macro