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Searched refs:regCP_RB1_ACTIVE (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_5_0_offset.h3487 #define regCP_RB1_ACTIVE … macro
H A Dgc_11_0_3_offset.h4738 #define regCP_RB1_ACTIVE … macro
H A Dgc_11_0_0_offset.h4514 #define regCP_RB1_ACTIVE … macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v11_0.c3668 WREG32_SOC15(GC, 0, regCP_RB1_ACTIVE, 1); in gfx_v11_0_cp_gfx_resume()