Searched refs:regCP_RB0_CNTL (Results 1 – 8 of 8) sorted by relevance
/linux/drivers/gpu/drm/amd/amdgpu/ |
H A D | gfx_v12_0.c | 2639 WREG32_SOC15(GC, 0, regCP_RB0_CNTL, tmp); in gfx_v12_0_cp_gfx_resume() 2659 WREG32_SOC15(GC, 0, regCP_RB0_CNTL, tmp); in gfx_v12_0_cp_gfx_resume()
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H A D | gfx_v11_0.c | 3615 WREG32_SOC15(GC, 0, regCP_RB0_CNTL, tmp); in gfx_v11_0_cp_gfx_resume() 3635 WREG32_SOC15(GC, 0, regCP_RB0_CNTL, tmp); in gfx_v11_0_cp_gfx_resume()
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/linux/drivers/gpu/drm/amd/include/asic_reg/gc/ |
H A D | gc_9_4_3_offset.h | 2788 #define regCP_RB0_CNTL … macro
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H A D | gc_9_4_2_offset.h | 337 #define regCP_RB0_CNTL … macro
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H A D | gc_11_5_0_offset.h | 3097 #define regCP_RB0_CNTL … macro
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H A D | gc_12_0_0_offset.h | 3460 #define regCP_RB0_CNTL … macro
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H A D | gc_11_0_3_offset.h | 4334 #define regCP_RB0_CNTL … macro
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H A D | gc_11_0_0_offset.h | 4118 #define regCP_RB0_CNTL … macro
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