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Searched refs:regCP_PQ_WPTR_POLL_CNTL1 (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_amdkfd_gfx_v11.c245 WREG32(SOC15_REG_OFFSET(GC, 0, regCP_PQ_WPTR_POLL_CNTL1), in hqd_load_v11()
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_3_offset.h2938 #define regCP_PQ_WPTR_POLL_CNTL1 … macro
H A Dgc_9_4_2_offset.h477 #define regCP_PQ_WPTR_POLL_CNTL1 … macro
H A Dgc_12_0_0_offset.h3556 #define regCP_PQ_WPTR_POLL_CNTL1 … macro
H A Dgc_11_0_3_offset.h4450 #define regCP_PQ_WPTR_POLL_CNTL1 … macro
H A Dgc_11_0_0_offset.h4230 #define regCP_PQ_WPTR_POLL_CNTL1 … macro