Searched refs:regCP_ME_PRGRM_CNTR_START (Results 1 – 7 of 7) sorted by relevance
| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | gfx_v11_0.c | 2802 WREG32_SOC15(GC, 0, regCP_ME_PRGRM_CNTR_START, in gfx_v11_0_config_me_cache_rs64()
2986 WREG32_SOC15(GC, 0, regCP_ME_PRGRM_CNTR_START, in gfx_v11_0_config_gfx_rs64()
3509 WREG32_SOC15(GC, 0, regCP_ME_PRGRM_CNTR_START, in gfx_v11_0_cp_gfx_load_me_microcode_rs64()
|
| H A D | gfx_v12_0.c | 2142 WREG32_SOC15(GC, 0, regCP_ME_PRGRM_CNTR_START, in gfx_v12_0_config_gfx_rs64()
2240 WREG32_SOC15(GC, 0, regCP_ME_PRGRM_CNTR_START, in gfx_v12_0_set_me_ucode_start_addr()
|
| /linux/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| H A D | gc_9_4_3_offset.h | 3002 #define regCP_ME_PRGRM_CNTR_START … macro
|
| H A D | gc_9_4_2_offset.h | 541 #define regCP_ME_PRGRM_CNTR_START … macro
|
| H A D | gc_12_0_0_offset.h | 3580 #define regCP_ME_PRGRM_CNTR_START … macro
|
| H A D | gc_11_0_3_offset.h | 4514 #define regCP_ME_PRGRM_CNTR_START … macro
|
| H A D | gc_11_0_0_offset.h | 4290 #define regCP_ME_PRGRM_CNTR_START … macro
|