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Searched refs:regCP_ME_INSTR_PNTR (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_3_offset.h186 #define regCP_ME_INSTR_PNTR … macro
H A Dgc_9_4_2_offset.h229 #define regCP_ME_INSTR_PNTR … macro
H A Dgc_11_5_0_offset.h1081 #define regCP_ME_INSTR_PNTR … macro
H A Dgc_12_0_0_offset.h2140 #define regCP_ME_INSTR_PNTR … macro
H A Dgc_11_0_3_offset.h2042 #define regCP_ME_INSTR_PNTR … macro
H A Dgc_11_0_0_offset.h1980 #define regCP_ME_INSTR_PNTR … macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v12_0.c114 SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_INSTR_PNTR),
H A Dgfx_v11_0.c157 SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_INSTR_PNTR),