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Searched refs:regCP_ME_CNTL (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v12_0.c2135 tmp = RREG32_SOC15(GC, 0, regCP_ME_CNTL); in gfx_v12_0_config_gfx_rs64()
2138 WREG32_SOC15(GC, 0, regCP_ME_CNTL, tmp); in gfx_v12_0_config_gfx_rs64()
2143 WREG32_SOC15(GC, 0, regCP_ME_CNTL, tmp); in gfx_v12_0_config_gfx_rs64()
2157 tmp = RREG32_SOC15(GC, 0, regCP_ME_CNTL); in gfx_v12_0_config_gfx_rs64()
2160 WREG32_SOC15(GC, 0, regCP_ME_CNTL, tmp); in gfx_v12_0_config_gfx_rs64()
2165 WREG32_SOC15(GC, 0, regCP_ME_CNTL, tmp); in gfx_v12_0_config_gfx_rs64()
2214 tmp = RREG32_SOC15(GC, 0, regCP_ME_CNTL); in gfx_v12_0_set_pfp_ucode_start_addr()
2221 WREG32_SOC15(GC, 0, regCP_ME_CNTL, tmp); in gfx_v12_0_set_pfp_ucode_start_addr()
2230 WREG32_SOC15(GC, 0, regCP_ME_CNTL, tmp); in gfx_v12_0_set_pfp_ucode_start_addr()
2256 tmp = RREG32_SOC15(GC, 0, regCP_ME_CNTL); in gfx_v12_0_set_me_ucode_start_addr()
[all …]
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_3_offset.h196 #define regCP_ME_CNTL … macro
H A Dgc_9_4_2_offset.h239 #define regCP_ME_CNTL … macro
H A Dgc_12_0_0_offset.h4058 #define regCP_ME_CNTL … macro
H A Dgc_11_0_3_offset.h6478 #define regCP_ME_CNTL … macro
H A Dgc_11_0_0_offset.h6198 #define regCP_ME_CNTL … macro