Home
last modified time | relevance | path

Searched refs:regCP_MEC_RS64_PRGRM_CNTR_START_HI (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v11_0.c2768 WREG32_SOC15(GC, 0, regCP_MEC_RS64_PRGRM_CNTR_START_HI, in gfx_v11_0_config_mec_cache_rs64()
2883 WREG32_SOC15(GC, 0, regCP_MEC_RS64_PRGRM_CNTR_START_HI, in gfx_v11_0_config_gfx_rs64()
3861 WREG32_SOC15(GC, 0, regCP_MEC_RS64_PRGRM_CNTR_START_HI, in gfx_v11_0_cp_compute_load_microcode_rs64()
H A Dgfx_v12_0.c2050 WREG32_SOC15(GC, 0, regCP_MEC_RS64_PRGRM_CNTR_START_HI, in gfx_v12_0_config_gfx_rs64()
2168 WREG32_SOC15(GC, 0, regCP_MEC_RS64_PRGRM_CNTR_START_HI, in gfx_v12_0_set_mec_ucode_start_addr()
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_5_0_offset.h6627 #define regCP_MEC_RS64_PRGRM_CNTR_START_HI macro
H A Dgc_12_0_0_offset.h5046 #define regCP_MEC_RS64_PRGRM_CNTR_START_HI macro
H A Dgc_11_0_3_offset.h8158 #define regCP_MEC_RS64_PRGRM_CNTR_START_HI macro
H A Dgc_11_0_0_offset.h7854 #define regCP_MEC_RS64_PRGRM_CNTR_START_HI macro