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Searched refs:regCP_MEC_RS64_INSTR_PNTR (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dmes_v11_0.c532 r = (RREG32_SOC15(GC, 0, regCP_MEC_RS64_INSTR_PNTR) << 2) - in mes_v11_0_reset_compute_pipe_mmio()
H A Dmes_v12_0.c548 r = (RREG32_SOC15(GC, 0, regCP_MEC_RS64_INSTR_PNTR) << 2) - in mes_v12_0_reset_compute_pipe_mmio()
H A Dgfx_v12_1.c126 SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC_RS64_INSTR_PNTR),
H A Dgfx_v12_0.c138 SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC_RS64_INSTR_PNTR),
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_12_0_0_offset.h4960 #define regCP_MEC_RS64_INSTR_PNTR macro
H A Dgc_11_0_3_offset.h8074 #define regCP_MEC_RS64_INSTR_PNTR macro
H A Dgc_11_0_0_offset.h7770 #define regCP_MEC_RS64_INSTR_PNTR macro