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Searched refs:regCP_MEC_RS64_INSTR_PNTR (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_5_0_offset.h6543 #define regCP_MEC_RS64_INSTR_PNTR … macro
H A Dgc_12_0_0_offset.h4960 #define regCP_MEC_RS64_INSTR_PNTR … macro
H A Dgc_11_0_3_offset.h8074 #define regCP_MEC_RS64_INSTR_PNTR … macro
H A Dgc_11_0_0_offset.h7770 #define regCP_MEC_RS64_INSTR_PNTR … macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v12_0.c119 SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC_RS64_INSTR_PNTR),