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Searched refs:regCP_MEC_ME1_UCODE_DATA (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_3_offset.h7104 #define regCP_MEC_ME1_UCODE_DATA … macro
H A Dgc_9_4_2_offset.h3426 #define regCP_MEC_ME1_UCODE_DATA … macro
H A Dgc_12_0_0_offset.h6188 #define regCP_MEC_ME1_UCODE_DATA … macro
H A Dgc_11_0_3_offset.h10252 #define regCP_MEC_ME1_UCODE_DATA … macro
H A Dgc_11_0_0_offset.h9710 #define regCP_MEC_ME1_UCODE_DATA … macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v11_0.c3901 WREG32_SOC15(GC, 0, regCP_MEC_ME1_UCODE_DATA, in gfx_v11_0_cp_compute_load_microcode()