Home
last modified time | relevance | path

Searched refs:regCP_MEC_ME1_UCODE_ADDR (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v11_0.c3898 WREG32_SOC15(GC, 0, regCP_MEC_ME1_UCODE_ADDR, 0); in gfx_v11_0_cp_compute_load_microcode()
3904 WREG32_SOC15(GC, 0, regCP_MEC_ME1_UCODE_ADDR, adev->gfx.mec_fw_version); in gfx_v11_0_cp_compute_load_microcode()
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_3_offset.h7100 #define regCP_MEC_ME1_UCODE_ADDR … macro
H A Dgc_9_4_2_offset.h3422 #define regCP_MEC_ME1_UCODE_ADDR … macro
H A Dgc_12_0_0_offset.h6184 #define regCP_MEC_ME1_UCODE_ADDR … macro
H A Dgc_11_0_3_offset.h10248 #define regCP_MEC_ME1_UCODE_ADDR … macro
H A Dgc_11_0_0_offset.h9706 #define regCP_MEC_ME1_UCODE_ADDR … macro