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Searched refs:regCP_MEC_MDBASE_LO (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v11_0.c2889 WREG32_SOC15(GC, 0, regCP_MEC_MDBASE_LO, addr2); in gfx_v11_0_config_mec_cache_rs64()
3983 WREG32_SOC15(GC, 0, regCP_MEC_MDBASE_LO, adev->gfx.mec.mec_fw_data_gpu_addr); in gfx_v11_0_cp_compute_load_microcode_rs64()
H A Dgfx_v12_0.c2878 WREG32_SOC15(GC, 0, regCP_MEC_MDBASE_LO, in gfx_v12_0_cp_compute_load_microcode_rs64()
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_12_0_0_offset.h6262 #define regCP_MEC_MDBASE_LO macro
H A Dgc_11_0_3_offset.h10332 #define regCP_MEC_MDBASE_LO macro
H A Dgc_11_0_0_offset.h9782 #define regCP_MEC_MDBASE_LO macro