Searched refs:regCP_MEC_MDBASE_LO (Results 1 – 6 of 6) sorted by relevance
| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | gfx_v11_0.c | 2920 WREG32_SOC15(GC, 0, regCP_MEC_MDBASE_LO, addr2); in gfx_v11_0_config_mec_cache_rs64()
4015 WREG32_SOC15(GC, 0, regCP_MEC_MDBASE_LO, adev->gfx.mec.mec_fw_data_gpu_addr); in gfx_v11_0_cp_compute_load_microcode_rs64()
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| H A D | gfx_v12_1.c | 2029 WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_MEC_MDBASE_LO, in gfx_v12_1_xcc_cp_compute_load_microcode_rs64()
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| H A D | gfx_v12_0.c | 2891 WREG32_SOC15(GC, 0, regCP_MEC_MDBASE_LO, in gfx_v12_0_cp_compute_load_microcode_rs64()
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| /linux/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| H A D | gc_12_0_0_offset.h | 6262 #define regCP_MEC_MDBASE_LO … macro
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| H A D | gc_11_0_3_offset.h | 10332 #define regCP_MEC_MDBASE_LO … macro
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| H A D | gc_11_0_0_offset.h | 9782 #define regCP_MEC_MDBASE_LO … macro
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