Home
last modified time | relevance | path

Searched refs:regCP_IQ_WAIT_TIME1_BASE_IDX (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_3_offset.h3023 #define regCP_IQ_WAIT_TIME1_BASE_IDX … macro
H A Dgc_9_4_2_offset.h562 #define regCP_IQ_WAIT_TIME1_BASE_IDX … macro
H A Dgc_12_0_0_offset.h3595 #define regCP_IQ_WAIT_TIME1_BASE_IDX … macro
H A Dgc_11_0_3_offset.h4533 #define regCP_IQ_WAIT_TIME1_BASE_IDX … macro
H A Dgc_11_0_0_offset.h4309 #define regCP_IQ_WAIT_TIME1_BASE_IDX … macro