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Searched refs:regCP_INT_CNTL (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v12_0.c4114 data = RREG32_SOC15(GC, 0, regCP_INT_CNTL); in gfx_v12_0_update_coarse_grain_clock_gating()
4119 WREG32_SOC15(GC, 0, regCP_INT_CNTL, data); in gfx_v12_0_update_coarse_grain_clock_gating()
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_3_offset.h2812 #define regCP_INT_CNTL macro
H A Dgc_9_4_2_offset.h359 #define regCP_INT_CNTL macro
H A Dgc_12_0_0_offset.h3482 #define regCP_INT_CNTL macro
H A Dgc_11_0_3_offset.h4354 #define regCP_INT_CNTL macro
H A Dgc_11_0_0_offset.h4136 #define regCP_INT_CNTL macro