Home
last modified time | relevance | path

Searched refs:regCP_HQD_QUEUE_PRIORITY_BASE_IDX (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_3_offset.h3295 #define regCP_HQD_QUEUE_PRIORITY_BASE_IDX … macro
H A Dgc_9_4_2_offset.h706 #define regCP_HQD_QUEUE_PRIORITY_BASE_IDX … macro
H A Dgc_12_0_0_offset.h3855 #define regCP_HQD_QUEUE_PRIORITY_BASE_IDX … macro
H A Dgc_11_0_3_offset.h4837 #define regCP_HQD_QUEUE_PRIORITY_BASE_IDX … macro
H A Dgc_11_0_0_offset.h4613 #define regCP_HQD_QUEUE_PRIORITY_BASE_IDX … macro