Home
last modified time | relevance | path

Searched refs:regCP_HQD_PQ_WPTR_POLL_ADDR (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_amdkfd_gc_9_4_3.c342 WREG32_SOC15_RLC(GC, GET_INST(GC, inst), regCP_HQD_PQ_WPTR_POLL_ADDR, in kgd_gfx_v9_4_3_hqd_load()
H A Damdgpu_amdkfd_gfx_v11.c238 WREG32(SOC15_REG_OFFSET(GC, 0, regCP_HQD_PQ_WPTR_POLL_ADDR), in hqd_load_v11()
H A Dmes_v11_0.c1257 WREG32_SOC15(GC, 0, regCP_HQD_PQ_WPTR_POLL_ADDR, in mes_v11_0_queue_init_register()
H A Dmes_v12_0.c1422 WREG32_SOC15(GC, 0, regCP_HQD_PQ_WPTR_POLL_ADDR, in mes_v12_0_queue_init_register()
H A Dmes_v12_1.c1330 WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_WPTR_POLL_ADDR, in mes_v12_1_queue_init_register()
H A Dgfx_v12_0.c165 SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PQ_WPTR_POLL_ADDR),
3361 WREG32_SOC15(GC, 0, regCP_HQD_PQ_WPTR_POLL_ADDR, in gfx_v12_0_kiq_init_register()
H A Dgfx_v11_0.c219 SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PQ_WPTR_POLL_ADDR),
4503 WREG32_SOC15(GC, 0, regCP_HQD_PQ_WPTR_POLL_ADDR, in gfx_v11_0_kiq_init_register()
H A Dgfx_v12_1.c2327 WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_WPTR_POLL_ADDR, in gfx_v12_1_xcc_kiq_init_register()
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_3_offset.h3308 #define regCP_HQD_PQ_WPTR_POLL_ADDR macro
H A Dgc_9_4_2_offset.h719 #define regCP_HQD_PQ_WPTR_POLL_ADDR macro
H A Dgc_12_0_0_offset.h3868 #define regCP_HQD_PQ_WPTR_POLL_ADDR macro
H A Dgc_11_0_3_offset.h4850 #define regCP_HQD_PQ_WPTR_POLL_ADDR macro
H A Dgc_11_0_0_offset.h4626 #define regCP_HQD_PQ_WPTR_POLL_ADDR macro