Searched refs:regCP_HQD_PQ_RPTR_REPORT_ADDR (Results 1 – 11 of 11) sorted by relevance
/linux/drivers/gpu/drm/amd/amdgpu/ |
H A D | mes_v12_0.c | 1142 WREG32_SOC15(GC, 0, regCP_HQD_PQ_RPTR_REPORT_ADDR, in mes_v12_0_queue_init_register()
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H A D | mes_v11_0.c | 1169 WREG32_SOC15(GC, 0, regCP_HQD_PQ_RPTR_REPORT_ADDR, in mes_v11_0_queue_init_register()
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H A D | gfx_v9_4_3.c | 1987 WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_RPTR_REPORT_ADDR, in gfx_v9_4_3_xcc_kiq_init_register()
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H A D | gfx_v12_0.c | 3185 WREG32_SOC15(GC, 0, regCP_HQD_PQ_RPTR_REPORT_ADDR, in gfx_v12_0_kiq_init_register()
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H A D | gfx_v11_0.c | 4241 WREG32_SOC15(GC, 0, regCP_HQD_PQ_RPTR_REPORT_ADDR, in gfx_v11_0_kiq_init_register()
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/linux/drivers/gpu/drm/amd/include/asic_reg/gc/ |
H A D | gc_9_4_3_offset.h | 3304 #define regCP_HQD_PQ_RPTR_REPORT_ADDR … macro
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H A D | gc_9_4_2_offset.h | 715 #define regCP_HQD_PQ_RPTR_REPORT_ADDR … macro
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H A D | gc_11_5_0_offset.h | 3595 #define regCP_HQD_PQ_RPTR_REPORT_ADDR … macro
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H A D | gc_12_0_0_offset.h | 3864 #define regCP_HQD_PQ_RPTR_REPORT_ADDR … macro
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H A D | gc_11_0_3_offset.h | 4846 #define regCP_HQD_PQ_RPTR_REPORT_ADDR … macro
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H A D | gc_11_0_0_offset.h | 4622 #define regCP_HQD_PQ_RPTR_REPORT_ADDR … macro
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