Searched refs:regCP_HQD_PQ_CONTROL (Results 1 – 9 of 9) sorted by relevance
| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | mes_v11_0.c | 1257 WREG32_SOC15(GC, 0, regCP_HQD_PQ_CONTROL, mqd->cp_hqd_pq_control); in mes_v11_0_queue_init_register()
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| H A D | mes_v12_0.c | 1421 WREG32_SOC15(GC, 0, regCP_HQD_PQ_CONTROL, mqd->cp_hqd_pq_control); in mes_v12_0_queue_init_register()
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| H A D | gfx_v12_0.c | 168 SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PQ_CONTROL),
3305 WREG32_SOC15(GC, 0, regCP_HQD_PQ_CONTROL, in gfx_v12_0_kiq_init_register()
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| H A D | gfx_v11_0.c | 213 SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PQ_CONTROL),
4428 WREG32_SOC15(GC, 0, regCP_HQD_PQ_CONTROL, in gfx_v11_0_kiq_init_register()
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| /linux/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| H A D | gc_9_4_3_offset.h | 3314 #define regCP_HQD_PQ_CONTROL … macro
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| H A D | gc_9_4_2_offset.h | 725 #define regCP_HQD_PQ_CONTROL … macro
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| H A D | gc_12_0_0_offset.h | 3874 #define regCP_HQD_PQ_CONTROL … macro
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| H A D | gc_11_0_3_offset.h | 4856 #define regCP_HQD_PQ_CONTROL … macro
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| H A D | gc_11_0_0_offset.h | 4632 #define regCP_HQD_PQ_CONTROL … macro
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