Searched refs:regCP_HQD_PQ_BASE_HI (Results 1 – 9 of 9) sorted by relevance
| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | mes_v11_0.c | 1248 WREG32_SOC15(GC, 0, regCP_HQD_PQ_BASE_HI, mqd->cp_hqd_pq_base_hi); in mes_v11_0_queue_init_register()
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| H A D | mes_v12_0.c | 1412 WREG32_SOC15(GC, 0, regCP_HQD_PQ_BASE_HI, mqd->cp_hqd_pq_base_hi); in mes_v12_0_queue_init_register()
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| H A D | gfx_v12_0.c | 163 SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PQ_BASE_HI),
3301 WREG32_SOC15(GC, 0, regCP_HQD_PQ_BASE_HI, in gfx_v12_0_kiq_init_register()
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| H A D | gfx_v11_0.c | 208 SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PQ_BASE_HI),
4424 WREG32_SOC15(GC, 0, regCP_HQD_PQ_BASE_HI, in gfx_v11_0_kiq_init_register()
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| /linux/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| H A D | gc_9_4_3_offset.h | 3300 #define regCP_HQD_PQ_BASE_HI … macro
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| H A D | gc_9_4_2_offset.h | 711 #define regCP_HQD_PQ_BASE_HI … macro
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| H A D | gc_12_0_0_offset.h | 3860 #define regCP_HQD_PQ_BASE_HI … macro
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| H A D | gc_11_0_3_offset.h | 4842 #define regCP_HQD_PQ_BASE_HI … macro
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| H A D | gc_11_0_0_offset.h | 4618 #define regCP_HQD_PQ_BASE_HI … macro
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