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Searched refs:regCP_HQD_PERSISTENT_STATE (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v9_4_3.c122 SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PERSISTENT_STATE),
1903 tmp = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PERSISTENT_STATE); in gfx_v9_4_3_xcc_mqd_init()
2026 WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_PERSISTENT_STATE, in gfx_v9_4_3_xcc_kiq_init_register()
2069 …WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_PERSISTENT_STATE, CP_HQD_PERSISTENT_STATE_DEF… in gfx_v9_4_3_xcc_q_fini_register()
H A Dmes_v12_0.c1161 WREG32_SOC15(GC, 0, regCP_HQD_PERSISTENT_STATE, mqd->cp_hqd_persistent_state); in mes_v12_0_queue_init_register()
H A Dmes_v11_0.c1188 WREG32_SOC15(GC, 0, regCP_HQD_PERSISTENT_STATE, mqd->cp_hqd_persistent_state); in mes_v11_0_queue_init_register()
H A Dgfx_v12_0.c136 SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PERSISTENT_STATE),
3101 tmp = RREG32_SOC15(GC, 0, regCP_HQD_PERSISTENT_STATE); in gfx_v12_0_compute_mqd_init()
3216 WREG32_SOC15(GC, 0, regCP_HQD_PERSISTENT_STATE, in gfx_v12_0_kiq_init_register()
H A Dgfx_v11_0.c176 SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PERSISTENT_STATE),
4157 tmp = RREG32_SOC15(GC, 0, regCP_HQD_PERSISTENT_STATE); in gfx_v11_0_compute_mqd_init()
4272 WREG32_SOC15(GC, 0, regCP_HQD_PERSISTENT_STATE, in gfx_v11_0_kiq_init_register()
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_3_offset.h3290 #define regCP_HQD_PERSISTENT_STATE … macro
H A Dgc_9_4_2_offset.h701 #define regCP_HQD_PERSISTENT_STATE … macro
H A Dgc_11_5_0_offset.h3581 #define regCP_HQD_PERSISTENT_STATE … macro
H A Dgc_12_0_0_offset.h3850 #define regCP_HQD_PERSISTENT_STATE … macro
H A Dgc_11_0_3_offset.h4832 #define regCP_HQD_PERSISTENT_STATE … macro
H A Dgc_11_0_0_offset.h4608 #define regCP_HQD_PERSISTENT_STATE … macro