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Searched refs:regCP_HQD_IB_CONTROL (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_3_offset.h3322 #define regCP_HQD_IB_CONTROL … macro
H A Dgc_9_4_2_offset.h733 #define regCP_HQD_IB_CONTROL … macro
H A Dgc_12_0_0_offset.h3882 #define regCP_HQD_IB_CONTROL … macro
H A Dgc_11_0_3_offset.h4864 #define regCP_HQD_IB_CONTROL … macro
H A Dgc_11_0_0_offset.h4640 #define regCP_HQD_IB_CONTROL … macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v12_0.c172 SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_IB_CONTROL),
H A Dgfx_v11_0.c217 SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_IB_CONTROL),