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Searched refs:regCP_HQD_EOP_RPTR (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_amdkfd_gfx_v11.c250 WREG32(SOC15_REG_OFFSET(GC, 0, regCP_HQD_EOP_RPTR), in hqd_load_v11()
H A Dgfx_v9_4_3.c137 SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_EOP_RPTR),
H A Dgfx_v12_1.c163 SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_EOP_RPTR),
H A Dgfx_v12_0.c177 SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_EOP_RPTR),
H A Dgfx_v11_0.c243 SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_EOP_RPTR),
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_3_offset.h3366 #define regCP_HQD_EOP_RPTR macro
H A Dgc_9_4_2_offset.h777 #define regCP_HQD_EOP_RPTR macro
H A Dgc_12_0_0_offset.h3924 #define regCP_HQD_EOP_RPTR macro
H A Dgc_11_0_3_offset.h4908 #define regCP_HQD_EOP_RPTR macro
H A Dgc_11_0_0_offset.h4684 #define regCP_HQD_EOP_RPTR macro